Verilog: Hardware Description Language

Verilog does the same job as VHDL — describing digital hardware — with a terser, C-like syntax that many engineers find faster to write.

Like VHDL, Verilog is a hardware description language: it's used to describe the logic gates, registers, and wiring of a digital circuit rather than a sequence of instructions for a CPU to run. A design written in Verilog can be simulated to check its behavior, then synthesized into an actual FPGA configuration or chip layout.

Verilog's syntax borrows heavily from C, with curly braces and semicolons, which many engineers find quicker to write than VHDL's more verbose, strongly-typed style. Both languages describe the same kinds of hardware and are widely used across the chip design industry, often side by side in the same company.

A typical Verilog project separates the design itself from a 'testbench' — a second piece of Verilog whose only job is to feed test inputs into the design and check that the outputs come out correct, long before any silicon is manufactured.